Английская Википедия:Half-carry flag
Шаблон:Primary sources A half-carry flag (also known as an auxiliary flag) is a condition flag bit in the status register of many CPU families, such as the Intel 8080, Zilog Z80, the x86,[1] and the Atmel AVR series, among others. It indicates when a carry or borrow has been generated out of the least significant four bits of the accumulator register following the execution of an arithmetic instruction. It is primarily used in decimal (BCD) arithmetic instructions.
Usage
Normally, a processor that utilizes binary arithmetic (which includes almost all modern CPUs) will add two 8-bit byte values according to the rules of simple binary addition. For example, adding 25Шаблон:Sub and 48Шаблон:Sub produces 6DШаблон:Sub. However, for binary-coded decimal (BCD) values, where each 4-bit nibble represents a decimal digit, addition is more complicated. For example, adding the decimal value 25 and 48, which are encoded as the BCD values 25Шаблон:Sub and 48Шаблон:Sub, the binary addition of the two values produces 6DШаблон:Sub. Since the lower nibble of this value is a non-decimal digit (D), it must be adjusted by adding 06Шаблон:Sub to produce the correct BCD result of 73Шаблон:Sub, which represents the decimal value 73.
0010 0101 25 + 0100 1000 48 ----------- 0110 1101 6D, intermediate result + 0110 06, adjustment ----------- 0111 0011 73, adjusted result
Likewise, adding the BCD values 39Шаблон:Sub and 48Шаблон:Sub produces 81Шаблон:Sub. This result does not have a non-decimal low nibble, but it does cause a carry out of the least significant digit (lower four bits) into the most significant digit (upper four bits). This is indicated by the CPU setting the half-carry flag. This value must also be corrected, by adding 06Шаблон:Sub to 81Шаблон:Sub to produce a corrected BCD result of 87Шаблон:Sub.
0011 1001 39 + 0100 1000 48 ----------- 1000 0001 81, intermediate result + 0110 06, adjustment ----------- 1000 0111 87, adjusted result
Finally, if an addition results in a non-decimal high digit, then 60Шаблон:Sub must be added to the value to produce the correct BCD result. For example, adding 72Шаблон:Sub and 73Шаблон:Sub produces E5Шаблон:Sub. Since the most significant digit of this sum is non-decimal (E), adding 60Шаблон:Sub to it produces a corrected BCD result of 145Шаблон:Sub. (Note that the leading 1 digit is actually a carry bit.)
0111 0010 72 + 0111 0011 73 ----------- 1110 0101 E5, intermediate result + 0110 60, adjustment ----------- 1 0100 0101 145, adjusted result
Summarizing, if the result of a binary addition contains a non-decimal low digit or causes the half-carry flag to be set, the result must be corrected by adding 06Шаблон:Sub to it; if the result contains a non-decimal high digit, the result must be further corrected by adding 60Шаблон:Sub to produce the correct final BCD value.
The Auxiliary Carry Flag in x86
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The Auxiliary Carry Flag (AF) is a CPU flag in the FLAGS register of all x86-compatible CPUs,[2] and the preceding 8080-family. It has occasionally been called the Adjust Flag by Intel.[3] The flag bit is located at position 4 in the CPU flag register. It indicates when an arithmetic carry or borrow has been generated out of the four least significant bits, or lower nibble. It is primarily used to support binary-coded decimal (BCD) arithmetic.
The Auxiliary Carry flag is set (to 1) if during an "add" operation there is a carry from the low nibble (lowest four bits) to the high nibble (upper four bits), or a borrow from the high nibble to the low nibble, in the low-order 8-bit portion, during a subtraction. Otherwise, if no such carry or borrow occurs, the flag is cleared or "reset" (set to 0). [4]
See also
References
