Английская Википедия:ARM11

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Шаблон:Short description Шаблон:Cleanup list Шаблон:Use dmy dates Шаблон:Infobox CPU

ARM11 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings.[1] The ARM11 core family consists of ARM1136J(F)-S, ARM1156T2(F)-S, ARM1176JZ(F)-S, and ARM11MPCore. Since ARM11 cores were released from 2002 to 2005, they are no longer recommended for new IC designs, instead ARM Cortex-A and ARM Cortex-R cores are preferred.[1]

Overview

Announced
Year Core
2002 ARM1136J(F)-S
2003 ARM1156T2(F)-S
2003 ARM1176JZ(F)-S
2005 ARM11MPCore

Шаблон:See also

The ARM11 product family (announced 29 April 2002) introduced the ARMv6 architectural additions which had been announced in October 2001. These include SIMD media instructions, multiprocessor support, exclusive loads and stores instructions[2] and a new cache architecture. The implementation included a significantly improved instruction processing pipeline, compared to previous ARM9 or ARM10 families, and is used in smartphones from Apple, Nokia, and others. The initial ARM11 core (ARM1136) was released to licensees in October 2002.

The ARM11 family are currently the only ARMv6-architecture cores. There are, however, ARMv6-M cores (Cortex-M0 and Cortex-M1), addressing microcontroller applications;[3] ARM11 cores target more demanding applications.

Differences from ARM9

In terms of instruction set, ARM11 builds on the preceding ARM9 generation. It incorporates all ARM926EJ-S featuresШаблон:Citation needed and adds the ARMv6 instructions for media support (SIMD) and accelerating IRQ response.

Microarchitecture improvements in ARM11 cores[4] include:

  • SIMD instructions which can double MPEG-4 and audio digital signal processing algorithm speed
  • Cache is physically addressed, solving many cache aliasing problems and reducing context switch overhead.
  • Unaligned and mixed-endian data access is supported.
  • Reduced heat production and lower overheating risk
  • Redesigned pipeline, supporting faster clock speeds (target up to 1 GHz)
    • Longer: 8 (vs 5) stages
    • Out-of-order completion for some operations (e.g., stores)
    • Dynamic branch prediction/folding (like XScale)
    • Cache misses don't block execution of non-dependent instructions.
    • Load/store parallelism
    • ALU parallelism
  • 64-bit data paths

JTAG debug support (for halting, stepping, breakpoints, and watchpoints) was simplified. The EmbeddedICE module was replaced with an interface which became part of the ARMv7 architecture. The hardware tracing modules (ETM and ETB) are compatible, but updated, versions of those used in the ARM9. In particular, trace semantics were updated to address parallel instruction execution and data transfers.

ARM makes an effort to promote recommended Verilog coding styles and techniques. This ensures semantically rigorous designs, preserving identical semantics throughout the chip design flow, which included extensive use of formal verification techniques. Without such attention, integrating an ARM11 with third-party designs could risk exposing hard-to-find latent bugs. Due to ARM cores being integrated into many different designs, using a variety of logic synthesis tools and chip manufacturing processes, the impact of its register-transfer level (RTL) quality is magnified many times.[5] The ARM11 generation focused more on synthesis than previous generations, making such concerns more of an issue.

Cores

There are four ARM11 cores:

  • ARM1136[6]
  • ARM1156, introduced Thumb2 instructions
  • ARM1176, introduced security extensions[7]
  • ARM11MPcore, introduced multicore support

Chips

Файл:Raspberry Pi B+ top.jpg
Raspberry Pi B+ with a Broadcom BCM2835 (ARM1176JZF-S)[8]
Файл:KraftCom CoaxLine Adapter CN-KE502M - Atheros AR7400-AG2C-9835.jpg
Atheros AR7400
Файл:Garmin Edge Explore - board - STMicroelectronics STA2065N2-1727.jpg
STMicroelectronics STA2065N2 (ARM1176) with embedded GPS

Шаблон:Expand list Шаблон:Unreferenced section

See also

Шаблон:Portal

References

Шаблон:Reflist

External links

Шаблон:Commons category multi

ARM11 official documents
Quick Reference Cards
  • Instructions: Thumb (1), ARM and Thumb-2 (2), Vector Floating Point (3)
  • Opcodes: Thumb (1, 2), ARM (3, 4), GNU Assembler Directives 5.
Other

Шаблон:Classic ARM-based chips Шаблон:Application ARM-based chips

  1. 1,0 1,1 ARM11 Family Webpage; ARM Holdings.
  2. Шаблон:Cite web
  3. not supported by Linux as of version 3.3
  4. "The ARM11 Microarchitecture", ARM Ltd, 2002
  5. The Dangers of Living with an X (bugs hidden in your Verilog), Version 1.1 (14 October 2003).
  6. Шаблон:Cite web
  7. Шаблон:Cite web
  8. Шаблон:Cite web
  9. Шаблон:Cite press release