Английская Википедия:B5000 instruction set

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The Burroughs B5000 was the first stack machine and also the first computer with a segmented virtual memory. The Burroughs B5000 instruction set includes the set of valid operations for the B5000, B5500 and B5700. It is not compatible with the B6500, B7500, B8500 or their successors.

Instruction streams on a B5000 contain 12-bit syllables, four to a word. The architecture has two modes, Word Mode and Character Mode, and each has a separate repertoire of syllables. A processor may be either Control State or Normal State, and certain syllables are only permissible in Control State. The architecture does not provide for addressing registers or storage directly; all references are through the 1024 word Program Reference Table (PRT), current code segment, marked locations within the stack or to the A and B registers holding the top two locations on the stack. Burroughs numbers bits in a syllable from 0 (high bit) to 11 (low bit) and in a word from 0 (high bit) to 47 (low bit).

Word Mode

In Word Mode, there are four types of syllables.

B5x00 Word Mode Syllables

Bits 10-11	Syllable Type	Bits 0-9
0	Literal Call	integer value
1	Opcode	Operation
2	Operand Call	Relative address
3	Descriptor Call	Relative address

The interpretation of the 10-bit relative address in Operand Call and Descriptor Call depends on the setting of several processor flags. For main programs (SALF off) it is always an offset into the Program Reference Table (PRT).

Шаблон:AnchorB5x00 Relative Addressing

SALFШаблон:Efn	T0 A38	T1 A39	T2 A40	MSFFШаблон:Efn	Base	Contents	Index Sign	Index BitsШаблон:Efn	Max Index
OFF	-	-	-	-	R	Address of PRT	+	T 0-9 A 38-47	1023
ON	OFF	-	-	-	R	Address of PRT	+	T 1-9 A 39-47	511
ON	ON	OFF	-	OFF	F	Address of last RCWШаблон:Efn or MSCWШаблон:Efn on stack	+	T 2-9 A 40-47	255
ON	ON	OFF	-	ON	(R+7)Шаблон:Efn Bits 18-32	F register from MSCWШаблон:Efn at PRT+7	+	T 2-9 A 40-47	255
ON	ON	ON	OFF	-	CШаблон:Efn	Address of current instruction word	+	T 3-9 A 41-47	127
ON	ON	ON	ON	OFF	F	Address of last RCWШаблон:Efn or MSCWШаблон:Efn on stack	-	T 3-9 A 41-47	127
ON	ON	ON	ON	ON	(R+7)Шаблон:Efn Bits 18-32	F register from MSCWШаблон:Efn at PRT+7	-	T 3-9 A 41-47	127
Notes: Шаблон:Notelist

References

Шаблон:Comp-hardware-stub