Английская Википедия:Cadence Design Systems
Шаблон:Short description Шаблон:Infobox company
Cadence Design Systems, Inc. (stylized as cādence), headquartered in San Jose, California,[1] is an American multinational computational software company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware, and silicon structuresШаблон:What for designing integrated circuits, systems on chips (SoCs), and printed circuit boards.[2]
History
Cadence Design Systems began as an electronic design automation (EDA) company, formed by the 1988 merger of Solomon Design Automation (SDA), co-founded in 1983 by Richard Newton, Alberto Sangiovanni-Vincentelli, and James Solomon, and ECAD, a public company co-founded by Ping Chao, Glen Antle, and Paul Huang in 1982. SDA's CEO Joseph Costello was appointed as CEO of the newly combined company.[3]
Following the resignation of Cadence's original CEO Joe Costello in 1997, Jack Harding was appointed CEO.[4] Ray Bingham was named CEO in 1999.[5] In 2004, Mike Fister became Cadence's new CEO.[6]
In 2008, Cadence's board appointed Lip-Bu Tan as acting CEO, after the resignation of Mike Fister; Tan had served on the Cadence board of directors since 2004.[7] In January 2009, the board of directors of Cadence voted unanimously to confirm Lip-Bu Tan as president and CEO. Tan had been most recently CEO of Walden International, a venture capital firm, where he remains chairman of the firm.[8]
In April 2021, following a Washington Post report on the use of Cadence and Synopsys technology in the People's Liberation Army's military-civil fusion efforts,[9] U.S. legislators Michael McCaul and Tom Cotton requested that the United States Department of Commerce tighten controls on the sales of semiconductor manufacturing software.[10][11]
On December 15, 2021, Anirudh Devgan assumed the role of president & CEO, and Lip-Bu Tan became executive chairman. Devgan joined Cadence in 2012 and was appointed president in 2017.[12]
Products
Шаблон:Advert section The company develops software, hardware and intellectual property (IP) used to design chips,[13] systems and printed circuit boards.[14] Cadence also supplies IP covering interfaces, memory, analog, SoC peripherals, and data plane processing units, and develops chip verification technologies including simulators and formal verification tools.
Custom IC technologies
- Virtuoso Platform. Tools for designing full-custom integrated circuits;[15] includes schematic entry, behavioral modeling (Verilog-AMS), circuit simulation, custom layout, physical verification, extraction, and back-annotation. Used mainly for analog, mixed-signal, RF, and standard-cell designs, but also memory and FPGA designs.
- Spectre X. In June 2019, Cadence introduced Spectre X parallel circuit simulator, so that users could distribute time- and frequency-domain simulations across hundreds of CPUs for faster runtime and speed.[16]
- AWR is a radio frequency to millimeter wave design environment for designing 5G/wireless products. Used for communications, aerospace and defense, semiconductor, computer, and consumer electronics.[17][18]
Digital implementation and signoff technologies
- Genus, Innovus, Tempus & Voltus. In March 2020, Cadence announced that its Innovus place and route engine and optimizer were now integrated into Genus Synthesis, with both tools using a common user interface and database.[19]
- Stratus High-level synthesis tool that creates RTL implementations from C, C++, or SystemC code.[20]
- Cerebrus. In July 2021, Cadence announced its machine learning-based Cerebrus chip explorer product to automatically optimize the Cadence digital design flow for specified power, performance, and area goals across multiple blocks. Cerebrus utilizes a reinforcement learning approach to increase efficiency each time the optimization process is repeated.[21][22]
Other Cadence RTL to GDS II tools: Conformal Equivalence Checker, Stratus High-Level Synthesis, Joules Power Analysis, Quantus RC Extraction, Modus AutomaticTest Pattern Generation.Шаблон:Citation needed
Verification technologies
- Xcelium. Xcelium is a parallel simulator, introduced in 2017, based on a multi-core parallel computing architecture.[23]
- JasperGold. JasperGold is a formal verification tool, initially introduced in 2003.[24] In 2019, Cadence announced new machine learning technology to automate JasperGold solver selection and parameterization to achieve faster first-time proofs; additionally to optimize regression runs.[25]
- Perspec System Verifier. Perspec was announced in 2014, for defining and verifying system-level verification scenarios, and then creating test cases to verify the scenarios using constraint-solving technology.[26] In mid-2018, Cadence announced that Perspec supported the new Accellera Portable Test and Stimulus Standard (PSS) standard.[27]
- Шаблон:Proper name. Шаблон:Proper name is verification management tool for tracking verification process, including coverage, using emulation, simulation, and/or formal technology as the data source(s).[28][29]
- Palladium. In 2015, Cadence announced the Palladium Z1 Hardware emulation platform,[30] with over 100 million gates per hour compile speed, and greater than 1 MHz execution for billion-gate designs.[31] Cadence's Palladium emulator was originally from Cadence's Quickturn acquisition in 1998.[32] In 2021, Cadence announced Palladium Z2, claiming a 1.5X performance and 2X capacity improvement over the prior Palladium Z1, for more than 18 billion gate+ capacity. Additionally, Cadence claimed Palladium Z2 could compile 10 billion gates in under 10 hours.[33][34]
- Protium. The Protium FPGA prototyping platform was officially introduced in 2014.[35] In 2017, Cadence introduced the Protium S1 built on Xilinx Virtex UltraScale FPGAs.[36] In 2019, Protium X1 rack-based prototyping was introduced,[37] which Cadence claimed supported a 1.2 billion gate SoCs at around 5 MHz.[38] Palladium S1/X1 and Protium share a single compilation flow.[39] In 2021, Protium X2 was announced; Cadence claimed a 1.5X performance and 2X capacity improvement over Protium X1, and that Protium X2 could compile 10 billion gates in under 24 hours.[40][41]
Intellectual property
Chip design IP targeting areas including memory/storage/high-performance interface protocols (USB or PCIe controllers and PHYs), Tensilica DSP processors for audio, vision, wireless modems, and convolutional neural nets. Tensilica DSP processors IP[42] include:
Tensilica Vision DSPs for Imaging, Vision, and AI processing;[43][44] Tensilica HiFi DSPs for Audio/Voice/Speech processing;[45][46] Tensilica Fusion DSPs for IoT;[47] Tensilica ConnX DSPs for Radar, Lidar, and Communications processing;[48][49] and Tensilica DNA Processor Family for AI acceleration[50][51]
In 2021, Cadence launched the Tensilica AI Platform to accelerate AI SoC development and improve power, performance, and area—targeting mobile, IoT, automotive, intelligent sensor, and industrial AI SoC designs.[52]
PCB and packaging technologies
- Allegro Platform. Tools for co-design of integrated circuits, packages, and PCBs,[53] including the Specctra auto-router.
- OrCAD/PSpice. Tools for smaller design teams and individual PCB designers.[53]
- OrbitIO Interconnect Designer. Die/package planning & route optimization tool.[54]
- InspectAR. InspectAR uses augmented reality to map out complicated circuit board electronics for real-time labelling of board schematics.[55]
System analysis
- Sigrity. Tools for signal, power integrity, and thermal integrity analysis and IC package design.[56]
- Clarity. Cadence introduced Clarity in April 2019, as part of its expansion into system analysis. Clarity is a 3D field solver for electromagnetic analysis, that uses distributed adaptive meshing to partition jobs across on hundreds of cores for gains in speed and capacity.[57]
- Celsius. In September 2019, Cadence announced Celsius, a parallel architecture thermal solver that uses finite element analysis for solid structures and computational fluid dynamics (CFD) for fluids.[58]
- Fidelity. Fidelity, formerly known as OMNIS, is a computational fluid dynamics, mesh generation, multi-physics simulation, and optimization product, with established applications in aerospace, automotive, industrial, and marine. (From NUMECA acquisition in 2021.)[59]
- Fidelity Fine Turbo. Turbomachinery CFD vertical, formerly known as FINE/Turbo. (From NUMECA acquisition in 2021.)
- Fidelity Fine Marine. Marine CFD vertical, formerly known as FINE/Marine. (From NUMECA acquisition in 2021.)
- Fidelity Fine Open. General CFD package, largely succeeded by Fidelity, formerly known as FINE/Open. (From NUMECA acquisition in 2021.)
- Fidelity Pointwise. Computational fluid dynamics (CFD) mesh generation. (From Pointwise acquisition in 2021.)[60]
- Cascade Technologies, Inc. Hi-fidelity CFD solvers for multiphysics analysis of turbulence fluid flows.[61]
Recognition
In 2016, Cadence CEO Lip-Bu Tan was awarded the Dr. Morris Chang Exemplary Leadership Award by the Global Semiconductor Alliance.[62]
In 2019, Investor's Business Daily ranked Cadence Design Systems #5 on its 50 Best Environmental, Social, and Governance (ESG) Companies list.[63]
In 2020, Fortune Magazine named Cadence to Fortune's "100 Best Companies to Work For list" for the sixth consecutive year.[64]
Also in 2020, Cadence was ranked #45 in PEOPLE magazine's Companies that Care.[65]
Sponsorship
In May 2022, McLaren announced a multi-year partnership deal with Cadence.[66]
Acquisitions
Timeline
Year announ- ced |
Company | Business | Value (USD) | Refe- rences |
---|---|---|---|---|
1989 | Gateway Design Automation | Simulation software | $72 million | [67] |
1990 | Automated Systems, Inc. | PCB Design Automation | $23 million | [68] |
1991 | Valid Logic | Gate-level design | $198 million | [69][70] |
1993 | Comdisco Systems | Digital signal processing & communications design | $13 million | [71] |
1997 | Cooper & Chyan Technology + UniCAD | Placement and routing (Specctra AutoRouter) and UniCAD (PCB Design) | $422 million | [72][73][74] |
1998 | Bell Labs Design Automation | Simulation and verification software | $45 million | [75] |
1998 | Quickturn Design Systems | Emulation hardware | $253 million | [76] |
1999 | OrCAD Systems | PCB & FPGA design | $121 million | [77] |
2002 | IBM's DFT tools & group | Design-for-Test | not disclosed | [78] |
2003 | Celestry Design | Dense modeling, full-chip circuit simulation | not disclosed | [79] |
2003 | Verplex | Formal verification, equivalence checkers | not disclosed | [80] |
2004 | Neolinear | Analog & mixed-signal layout, circuit sizing | not disclosed | [81] |
2005 | Verisity | Verification automation, hardware acceleration | $315 million | [82] |
2006 | Praesagus | Manufacturing variation predication | $26 million | [83] |
2007 | Invarium | Lithography-modeling and pattern-synthesis | not disclosed | [84] |
2007 | Clear Shape | Design for Manufacturing | not disclosed | [85][86] |
2008 | Chip Estimate | IP portal, IP reuse management | not disclosed | [87] |
2010 | Denali Software | Memory models, design IP, verification IP | $315 million | [88] |
2011 | Altos Design Automation | Foundation IP characterization, such as memory, standard cell libraries | not disclosed | [89][90] |
2011 | Azuro | Clock concurrent optimization | not disclosed | [91] |
2012 | Sigrity | Signal, power & thermal integrity analysis, IC package design | $80 million | [92][56] |
2013 | Cosmic Circuits | Analog & mixed-signal IP for mobile device IP, such as USB, MIPI, audio & Wi-Fi cores | not disclosed | [93][94] |
2013 | Tensilica | Dataplane processing IP | $380 million | [95][96] |
2013 | Evatronix | Semiconductor IP: USB, MIPI, display, & storage interfaces | not disclosed | [97] |
2014 | Forte Design Systems | High-level synthesis | not disclosed | [98][99] |
2014 | Jasper Design Automation | Formal analysis & verification | $170 million | [100][101] |
2016 | Rocketick Technologies | Multi-core parallel simulator | not disclosed | [102] |
2017 | nusemi | High-speed Serializer/Deserializer (SerDes) communications IP | not disclosed | [103] |
2019 | AWR Corporation | Wireless/high-frequency radio-frequency application design software | $160 million | [104] |
2020 | Integrand Software | Method of moments solver technology for analysis & extraction for simulating large IC and packages, characterization, and analysis in 3D-IC systems | not disclosed | [105][106] |
2020 | InspectAR Augmented Interfaces | Maps electronics & labels circuit board schematics in real-time using augmented reality | not disclosed | [107][108] |
2021 | NUMECA | CFD, mesh generation, multi-physics simulation & optimization | not disclosed | [59] |
2021 | Pointwise | Computational fluid dynamics (CFD) mesh generation | not disclosed | [60] |
2022 | Future Facilities | Computational Fluid Dynamics (CFD) solution provider for electronics cooling and energy performance optimization solutions for data center design and operations | not disclosed | [109] |
2022 | OpenEye Scientific | Computational molecular modeling and simulation software used by pharmaceutical and biotechnology companies for drug discovery | $500 million | [110] |
2023 | Rambus | Completion of acquisition of SerDes and memory interface PHY IP business from Rambus Inc. | not disclosed | [111] |
2023 | Intrinsix Corporation | Semiconductor design services provider | not disclosed | [112] |
2024 | Invecas Inc | Design engineering, Embedded software and System-level solutions provider | not disclosed | [113] |
The company has also acquired High-Level Design (HLD), UniCAD, CadMOS, Ambit Design Systems, Simplex, Silicon Perspective, Plato, and Get2Chip.
Related
- In 2007, Cadence was rumored to be in talks with Kohlberg Kravis Roberts and Blackstone Group regarding a possible sale of the company.[114]
- In 2008, Cadence withdrew a $1.6 billion offer to purchase rival Mentor Graphics.[115]
Lawsuits
- Avanti Corporation Шаблон:Main From 1995 until 2002, Cadence was involved in a 6-year-long legal dispute[116] with Avanti Corporation (brand name "Avant!"), in which Cadence claimed Avanti stole Cadence code, and Avanti denied it. According to Business Week "The Avanti case is probably the most dramatic tale of white-collar crime in the history of Silicon Valley".[116] The Avanti executives eventually pleaded no contest and Cadence received several hundred million dollars in restitution. Avanti was then purchased by Synopsys, which paid $265 million more to settle the remaining claims.[117] The case resulted in a number of legal precedents.[118]
- Aptix Corporation Quickturn Design Systems, a company acquired by Cadence, was involved in a series of legal events with Aptix Corporation. Aptix licensed a patent to Mentor Graphics and the two companies jointly sued Quickturn over an alleged patent infringement. Amr Mohsen, CEO of Aptix, forged and tampered with legal evidence and was subsequently charged with conspiracy, perjury, and obstruction of justice. Mohsen was arrested after violating his bail agreement by attempting to flee the country. While in jail, Mohsen plotted to intimidate witnesses and kill the federal judge presiding over his case.[119] Mohsen was further charged with attempting to delay a federal trial by feigning incompetency.[120][121] Due to the overwhelming misconduct, the judge ruled the lawsuit as unenforceable and Mohsen was sentenced to 17 years in prison.[122] Mentor Graphics subsequently sued Aptix to recoup legal costs. Cadence also sued Mentor Graphics and Aptix to recover legal costs.[123]
- Berkeley Design Automation In 2013, Cadence sued Berkeley Design Automation (BDA) for circumvention of a license scheme to link its Analog FastSpice (AFS) simulator to Cadence's Analog Design Environment (Virtuoso ADE).[124] The lawsuit was settled less than one year later with an undisclosed payment of BDA and a multi-year agreement to support interoperability of AFS with ADE through Cadence's official interface. BDA was bought by Mentor Graphics a few months later.[125]
Notable persons
- Alberto Sangiovanni-Vincentelli, co-founder[126]
- Richard Newton, co-founder
- James Solomon, co-founder
- Ken Kundert, fellow. Creator of the Spectre circuit simulation family of products (including SpectreRF) and the Verilog-A analog hardware description language
- Joseph Costello, CEO, 1988–1997
- Lip-Bu Tan, CEO, 2009–2021
- Anirudh Devgan, President 2017–2021, President and CEO, 2021–present
- Penny Herscher
See also
References
External links
Шаблон:Programmable Logic Шаблон:NASDAQ-100 Шаблон:Authority control
- ↑ Investor's Business Daily CEO Lip-Bu Tan Molds Troubled Cadence Into Long-Term Leader Retrieved November 12, 2020
- ↑ The Street How Cadence Designs the Future Retrieved July 21, 2020
- ↑ NYTimes A Fun Chief at Cadence Is Serious Merger Man Retrieved October 4, 1991
- ↑ WSJ Cadence's Costello Steps Down As CEO to Join Software Firm Retrieved October 21, 1997
- ↑ EETimes Harding replaced as Cadence president Retrieved April 27, 1999
- ↑ WSJ Intel's Michael Fister Resigns To Take Top Job at Cadence Retrieved May 13, 2004
- ↑ IConnect007 Cadence CEO Mike Fister Resigns Retrieved October 15, 2008
- ↑ EETimes Lip-Bu Tan named Cadence CEO Retrieved January 8, 2009
- ↑ Шаблон:Cite news
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite news
- ↑ Guru Focus Cadence Announces Anirudh Devgan to Become CEO in December 2021 Retrieved July 26, 2021
- ↑ Design on Diagonal Path in Pursuit of a Faster Chip, John Markoff, The New York Times, February 26, 2007
- ↑ NYTimes Cadence Acquires Software Company Retrieved April 11, 1990
- ↑ Шаблон:Cite web
- ↑ New Electronics Cadence looks to boost simulation performance with the Spectre X Simulator Retrieved June 3, 2019
- ↑ Chin, Spencer (December 5, 2019). "Cadence acquires AWR from NI to bolster 5G presence" Fierce Electronics Retrieved September 6, 2021
- ↑ Levitsky, Allison (December 2, 2019). "Cadence Design Systems to acquire AWR Corp. from National Instruments for $160M" Silicon Valley Business Journal Retrieved September 6, 2021
- ↑ EENews Europe Cadence's digital full flow promises up to 3X faster throughput, better results Retrieved March 17, 2020
- ↑ Morris, Kevin Powers AI Revolution EEJournal Retrieved Mar 31, 2020
- ↑ Takahashi, Dean (August 18, 2021). "Cadence Design Systems launches Cerebrus machine learning for chip design" Venture Beat Retrieved September 5, 2021
- ↑ Deutshcer, Maria (July 22, 2021). "Chip design giant Cadence launches AI platform to speed processor development" Silicon Angle Retrieved September 5, 2021
- ↑ EET Asia Multi-core parallel engine powers Cadence simulator Retrieved March 1, 2017.
- ↑ EETimes Startup promises 'pure' formal tool for verification Retrieved May 19, 2003
- ↑ eeNews Europe Formal verification platform leverages AI to speed up verification throughput Retrieved May 9, 2019
- ↑ Electronics Weekly Chip verification moves to system-level Retrieved December 11, 2014
- ↑ Electronics Weekly EDA embraces standard to streamline IC test and verification Retrieved July 6, 2018
- ↑ Tech Design Forum Cadence uses SQL to boost verification manager capacity Retrieved February 24, 2014
- ↑ Oct 6, 2003 has tool for SoC design project management Electronics Weekly Retrieved Oct 30, 2021
- ↑ EE Journal State of Emulation Retrieved June 6, 2016
- ↑ Electronic Specifier Enterprise Emulation Platform Develops Supercomputer Retrieved October 26, 2016
- ↑ NY Times Cadence to Acquire Quickturn Design Retrieved 36137
- ↑ Neowin Cadence's latest Palladium and Protium "dynamic duo" to offer 2X capacity and 1.5X gains Retrieved Apr 5, 2021
- ↑ EENews Europe Cadence boosts its emulation and verification systems Retrieved Apr 5, 2021
- ↑ EDN Cadence unveils Protium FPGA-based SoC prototyping platform Retrieved July 14, 2014
- ↑ EET Asia Multi-core parallel engine powers Cadence simulator Retrieved March 1, 2017
- ↑ Tech Design Forum Cadence Expands Protium for Rack-Based Prototyping Retrieved May 28, 2019
- ↑ Electronics Weekly Cadence machine can prototype a 1bn gate SoC on FPGAs Retrieved May 29, 2019
- ↑ EE Journal Cadence EDA Update Retrieved May 8, 2017
- ↑ Embedded Cadence speeds billion gate SoC verification Retrieved Apr 7, 2021
- ↑ New Electronics Cadence unveils next-generation Palladium Z2 and Protium X2 systems Retrieved Apr 6, 2021
- ↑ Шаблон:Cite web
- ↑ AnandTech Cadence Announces Tensilica Q7 DSP Retrieved May 15, 2029
- ↑ Embedded Cadence: Tensilica Vision Q7 DSP IP doubles vision and AI performance for automotive, AR/VR mobile Retrieved May 16, 2019
- ↑ eeNews Embedded Cadence Tensilica HiFi 5 DSP for audio and voice processing Retrieved November 1, 2018
- ↑ EE Journal Watching AI Evolve Retrieved November 12, 2018
- ↑ Engineering.com Cadence Announces Availability of Tensilica Xtensa LX7 Processor Architecture Retrieved September 30, 2016
- ↑ Embedded Computing Design Cadence's Tensilica ConnX B20 DSP IP Boosts Performance for Automotive Radar/Lidar and 5G Retrieved March 8, 2019
- ↑ Electronics Weekly Cadence ups DSP throughput for 5G comms, and automotive radar and lidar Retrieved March 7, 2019
- ↑ AnandTech Cadence Announces The Tensilica DNA 100 IP: Bigger Artificial Intelligence Retrieved September 19, 2018
- ↑ Electronic Design Cadence's Deep-Neural-Network Processor Pushes to 3.4 TMACs/W Retrieved September 26, 2018
- ↑ HelpNet Security Cadence Tensilica AI Platform accelerates intelligent SoC development Retrieved Sep 15, 2021
- ↑ 53,0 53,1 Шаблон:Cite web
- ↑ Schilling, Andreas (May 2, 2018). approach: TSMC stacks several wafers on top of each other Hardware LuxxRetrieved May 2, 2018
- ↑ Kirkwood, Isabelle Newfoundland's InspectAR Acquired By Cadence Design Systems BetaKit Retrieved Aug 13, 2020
- ↑ 56,0 56,1 EE Times Cadence Pays $80 million to buy signal integrity firm Retrieved July 3, 2012
- ↑ Шаблон:Cite web
- ↑ EE News Embedded Complete Electrical-thermal co-simulation for system analysis Retrieved September 19, 2019
- ↑ 59,0 59,1 eeNews Europe Cadence buys Belgian CFD specialist Retrieved Jan 21, 2021
- ↑ 60,0 60,1 eeNews OneSpin deal leads flurry of EDA acquisitions: Page 2 of 3 Retrieved Apr 15, 2021
- ↑ Cascade CFD Blog
- ↑ GSA Website Dr. Morris Chang Exemplary Leadership Award Winner Retrieved November 28, 2020
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite web
- ↑ Great Place to Work PEOPLE Companies that Care 2020 Retrieved November 28, 2020
- ↑ Шаблон:Cite web
- ↑ NY Times Cadence to Buy Gateway Design Retrieved January 20, 2005
- ↑ NY Times Cadence Acquires Software Company Retrieved April 11, 1990
- ↑ UPI Cadence Design, Valid Logic Retrieved October 2, 1991
- ↑ SemiEngineering Valid Logic Systems Retrieved November 29, 2020
- ↑ Funding Universe Cadence Design Systems History Retrieved January 20, 2005
- ↑ Cadence to Buy Cooper & Chyan Retrieved October 29, 1996
- ↑ Wall Street Journal Cadence Design Systems Agrees To Purchase Cooper & Chyan Retrieved October 29, 1996
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite news
- ↑ Шаблон:Cite news
- ↑ Шаблон:Cite web
- ↑ EE Times Cadence buys IBM's design-for-test tools business Retrieved October 1, 2002
- ↑ EDN Cadence Acquires Celestry Retrieved January 16, 2003
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite web
- ↑ EE Times Cadence completes acquisition of Verisity Retrieved April 7, 2005
- ↑ Шаблон:Cite web
- ↑ Electronic Design Cadence Acquires Invarium To Beef Up DFM Technology Retrieved July 22, 2007
- ↑ Шаблон:Cite web
- ↑ EDN Cadence to acquire Clear Shape Retrieved January 20, 2005
- ↑ Шаблон:Cite web
- ↑ EDN Cadence to buy Denali for $315 million Retrieved May 13, 2010
- ↑ EE Times Cadence Buys Altos Design Automation Retrieved May 10, 2011
- ↑ Silicon Valley Business Journal Cadence acquires Altos Design Automation Retrieved May 10, 2011
- ↑ EE Times Cadence acquires power specialist Azuro Retrieved July 12, 2011
- ↑ Evertiq Cadence acquires Sigrity Retrieved July 3, 2012
- ↑ EE News Europe Cosmic Circuits Acquisition helps Cadence to expand IP Portfolio Retrieved February 7, 2013
- ↑ EE Times Cadence buys analog IP startup Retrieved February 7, 2013
- ↑ EETimes Cadence to acquire Tensilica Retrieved March 11, 2013
- ↑ VentureBeat Cadence buys chip design firm Tensilica for $380m Retrieved March 11, 2013
- ↑ EE Times Cadence buying Evatronix to boost IP pool Retrieved May 7, 2013
- ↑ New Electronics Cadence Buys Forte, Looks to build HLS offering Retrieved February 6, 2014
- ↑ Electronics 360 The Math Backs Cadence's Forte Acquisition Retrieved February 6, 2014
- ↑ eeNews Embedded Cadence Grows formal verification profile with Jasper DA buyout Retrieved April 23, 2014
- ↑ Electronics 360 Cadence Keeps Consolidating with Jasper Purchase Retrieved April 22, 2014
- ↑ EENews Analog Cadence acquires parallel logic simulation speed-up tech with Rocketick purchase Retrieved April 13, 2016
- ↑ eeNews Analog Cadence grows high-speed communications IP offering with nusemi dea Retrieved November 2, 2017
- ↑ Silicon Valley Business Journal Cadence Design Systems to acquire AWR Corp. from National Instruments for $160M Retrieved December 2, 2019
- ↑ New Electronics Cadence makes Integrand acquisition Retrieved February 17, 2020
- ↑ everythingRF Cadence Accelerates Innovation in 5G RF Communications by Acquiring Integrand Retrieved February 14, 2020
- ↑ CBC A new chapter: Silicon Valley firm buys St. John's tech company Retrieved August 13, 2020
- ↑ Betakit Newfoundland's InspectAR Acquired by Cadence Design Systems Retrieved August 13, 2020
- ↑ Cadence News Releases Cadence completes acquisition of Future Facilities Retrieved July 26, 2022
- ↑ Шаблон:Cite news
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite web
- ↑ Шаблон:Cite web
- ↑ Specialized Software Maker Is Said to Be in Buyout Talks, Andrew Ross Sorkin and Michael J. de la Merced, The New York Times, Published: June 4, 2007
- ↑ Шаблон:Cite web
- ↑ 116,0 116,1 Business Week (pay wall) overview of the entire case, after the criminal trial but before the purchase by Synopsys.
- ↑ EEDesign article about the final settlement.
- ↑ Cadence v. Avanti: The UTSA and California Trade Secret Law Шаблон:Webarchive, Danley, J., Berkeley Technology Law Journal, 2004, Vol 19; Part 1, pages 289-308
- ↑ In Courts, Threats Become Alarming Fact of Life, Deborah Sontag, The New York Times, 20 March 2005
- ↑ Odd legal saga takes an ugly turn, Richard Goering, EE Times, 02 August 2004
- ↑ Jury finds Mohsen guilty of perjury, obstruction of justice, Dylan McGrath, EE Times, 28 February 2006
- ↑ Bailey, Brian (September 6, 2011). "Amr Mohsen – A story so bizarre…" EETimesRetrieved September 5, 2021
- ↑ Santarini, Michael (February 19, 2003). "Mentor loses patent suit against Cadence" EETimesRetrieved September 5, 2021
- ↑ Cadence sues Berkeley Design Automation, Dylan McGrath, EE Times, 15 April 2013
- ↑ Mentor buys Berkeley DA after Cadence lawsuit, Peter Clarke, eeNews Europe, 24 March 2014
- ↑ Шаблон:Cite web
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