Английская Википедия:IBM Enterprise Systems Architecture

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Шаблон:More citations needed

Шаблон:IBM mainframes

IBM Enterprise Systems Architecture is an instruction set architecture introduced by IBM as ESA/370 in 1988. It is based on the IBM System/370-XA architecture.

It extended the dual-address-space mechanism introduced in later IBM System/370 models by adding a new mode in which general-purpose registers 1-15 are each associated with an access register referring to an address space, with instruction operands whose address is computed with a given general-purpose register as a base register will be in the address space referred to by the corresponding address register.

The later ESA/390, introduced in 1990, added a facility to allow device descriptions to be read using channel commands and, in later models, added instructions to perform IEEE 754 floating-point operations and increased the number of floating-point registers from 4 to 16.

Enterprise Systems Architecture is essentially a 32-bit architecture; as with System/360, System/370, and 370-XA, the general-purpose registers are 32 bits long, and the arithmetic instructions support 32-bit arithmetic. Only byte-addressable real memory (Central Storage) and Virtual Storage addressing is limited to 31 bits, as is the case with 370-XA. (IBM reserved the most significant bit to easily support applications expecting 24-bit addressing, as well as to sidestep a problem with extending two instructions to handle 32-bit unsigned addresses.) It maintains problem state backward compatibility dating back to 1964 with the 24-bit-address/32-bit-data (System/360 and System/370) and subsequent 24/31-bit-address/32-bit-data architecture (System/370-XA). However, the I/O subsystem is based on System/370 Extended Architecture (S/370-XA), not on the original S/370 I/O instructions.

ESA/370 architecture

Шаблон:Stub-section Шаблон:Infobox CPU architecture

IBM S/370-ESA and S/390-ESA registers
General Registers 0-15

Two's complement value
0 31
Access Registers 0-15Шаблон:Sfn

0 0 0 0 0 0 0 P ALESN ALEN

0 6 7 8 15 16 31
Шаблон:Nowrap
Bits Field Meaning
0-6 0000000
7 P Primary
0=use dispatchable-unit access list
1=use primary-space access list
8-15 ALESN access-list-entry sequence number
16-31 ALEN access-list-entry number
Control Registers 0-15

See Principles of OperationШаблон:SfnШаблон:Sfn or Control Registers
0 31
Floating Point Registers 0-6/0-15Шаблон:Efn

S Biased exponent Mantissa
0 1 7 8 31

Mantissa (continued)
32 63
Enterprise Systems Architecture Extended Control mode PSW Шаблон:Sfn Шаблон:Sfn

0 R 0 0 0 T I
O
E
X
Key 1 M W P AS CC Program
Mask
0 0 0 0 0 0 0 0
0 1 2 4 5 6 7 8 11 12 13 14 15 16 17 18 19 20 23 24 31

A Instruction Address
32 33 63
Шаблон:Nowrap
Bits Field Meaning
1 R PER Mask
5 T DAT mode
6 IO I/O Mask; subject to channel mask in CR2
7 EX External Mask; subject to external subclass mask in CR0
8-11 Key PSW key
12 E=1 Extended Control mode
13 M Machine-check mask
14 W Wait state
15 P Problem state
16-17 AS Address-Space Control
00=primary-space mode
01=Access-register mode
10=Secondary-space mode
11=Home-space mode
18-19 CC Condition Code
20-23 PM
Шаблон:Nowrap
Bit Meaning
20 Fixed-point overflow
21 Decimal overflow
22 Exponent underflowШаблон:Efn
23 SignificanceШаблон:Efn
32 A Addressing mode
0=24 bit; 1=31 bit
33-63 IA Instruction Address

On February 15, 1988, IBM announced[1][2] Enterprise Systems Architecture/370 (ESA/370) for 3090 enhanced ("E") models and for 4381 model groups 91E and 92E.

In addition to the primary-space and secondary-space addressing modes that later System/370 models, and System/370 Extended Architecture (S/370-XA) models, support, ESA has an access register mode in which each use of general register 1-15 as a base register uses an associated access register to select an address space.Шаблон:Sfn In addition to the normal address spaces that machines with the dual-address-space facility support, ESA also allows data spaces, which contain no executable code.

Шаблон:AnchorESA/390 architecture

Шаблон:Infobox CPU architecture

A machine may be divided into Logical Partitions (LPARs), each with its own virtual system memory so that multiple operating systems may run concurrently on one machine.

An important capability to form a Parallel Sysplex was added to the architecture in 1994.

ESA/390 also extends the Sense ID command to provide additional information about a device, and additional device-dependent channel commands, the command codes for which are provided in the Sense ID information, to allow device description information to be fetched from a device.Шаблон:SfnШаблон:Rp[3]

Some PC-based IBM-compatible mainframes which provide ESA/390 processors in smaller machines have been released over time, but are only intended for software development.

New channel commands

The following channel commandsШаблон:Efn are new, or have their functionality changed, in ESA/390:[3]

ESA/390 I/O-Device Commands
Command Bit Position
0 1 2 3 4 5 6 7
Read configuration data D D D D D D D 0
Read node identifier D D D D D D D 0
Sense ID 1 1 1 0 0 1 0 0
Set interface identifier D D D D D D D 1
Note:
D Device dependent. The command code, if any, recognized by an I/O device may be obtained by using a sense-ID command.

Notes

Шаблон:Notelist

References

S370-ESA
Шаблон:Cite book
S/390-ESA
Шаблон:Cite book

Шаблон:Reflist