Английская Википедия:Gem5

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Шаблон:Short description Шаблон:Orphan Шаблон:Infobox software Шаблон:Lowercase title The gem5 simulator is an open-source system-level and processor simulator. It is utilized in academic research and in industry by companies such as ARM Research, AMD Research, Google, Micron, Metempsy, HP, and Samsung.[1][2] Arm has developed further software called Streamline for developers working with gem5 which aims to present "a graphical view of system execution".[3]

History

The gem5 simulator was born out of the merger of m5 (CPU simulation framework) and GEMS (memory timing simulator).[4]

Features

gem5 is an event-driven simulator with multiple execution modes.[4]

  • full-system emulation (simulating the whole OS) and syscall emulation (just user-space is emulated)
  • multiple ISAs (Alpha, ARM, SPARC, MIPS, POWER, RISC-V, and x86 ISAs)[1]
  • timing model for the full cache hierarchy with support for custom coherence protocols
  • simplistic CPU, in-order CPU, out-of-order CPU
  • serialize/deserialization from checkpoints

References

Шаблон:Reflist

External links

Шаблон:Comp-sci-stub